
Layer definition files for supported integrated circuit fabrication processes are listed on this page. If you need to model a new process, start from one of these files as an example, or contact us to do it for you.
(MIT Lincoln Laboratory, Lexington MA)
MITLL process data are not open to the general public. E-mail the SUN Magnetics team to request access.
Filename | Description | Last modification |
---|---|---|
MITLL_sfq3ee.ldf | Calibrated layer definitions for 4-layer SFQ3ee process | 8 April 2015 |
MITLL_sfq4ee.ldf | Calibrated layer definitions for 8-layer SFQ4ee process | 9 April 2015 |
MITLL_sfq5ee.ldf | Calibrated layer definitions for 8-layer SFQ5ee process | 24 August 2017 |
Filename | Description | Last modification |
---|---|---|
h4k5.ldf | Generic layer definitions (nominal process parameters) | 18 February 2014 |
h4k5_fast.ldf | Layer definitions for faster simulations | 18 February 2014 |
h4k5_ma.ldf | Layer definitions calibrated for Mask Aligner process | 10 August 2013 |
h4k5_ws.ldf | Layer definitions calibrated for Wafer Stepper process | 18 February 2014 |
h4k5_res.ldf | Generic layer definitions (nominal process parameters) with R2 layer resistors modelled | 18 February 2014 |
Filename | Description | Last modification |
---|---|---|
i1k.ldf | Generic layer definitions | 10 August 2013 |
i1k_fast.ldf | Layer definitions for faster simulations | 10 August 2013 |
i1k_res.ldf | Generic layer definitions with R1 layer resistors modelled | 10 August 2013 |
(For calculations on layouts before 2012)
Filename | Description | Last modification |
---|---|---|
i1k_old.ldf | Generic layer definitions | 10 August 2013 |
i1k_old_fast.ldf | Layer definitions for faster simulations | 10 August 2013 |
Click here for the AIST STP2 and ADP2 layer definition files.